Cristin-resultat-ID: 1262143
Sist endret: 2. februar 2016, 13:45
NVI-rapporteringsår: 2015
Resultat
Vitenskapelig artikkel
2015

Supply Voltage Dependency on the Single Event Upset Susceptibility of Temporal Dual-Feedback Flip-Flops in a 90 nm Bulk CMOS Process

Bidragsytere:
  • Amir Hasanbegovic og
  • Snorre Aunet

Tidsskrift

IEEE Transactions on Nuclear Science
ISSN 0018-9499
e-ISSN 1558-1578
NVI-nivå 1

Om resultatet

Vitenskapelig artikkel
Publiseringsår: 2015
Publisert online: 2015
Volum: 62
Hefte: 4
Sider: 1888 - 1897

Importkilder

Scopus-ID: 2-s2.0-84939605600
Scopus-ID: 2-s2.0-85027952844

Beskrivelse Beskrivelse

Tittel

Supply Voltage Dependency on the Single Event Upset Susceptibility of Temporal Dual-Feedback Flip-Flops in a 90 nm Bulk CMOS Process

Sammendrag

In this paper we investigate the efficiency of using temporal and spatial hardening techniques in flip-flop design for single event upset (SEU) mitigation at different supply voltages. We present three novel SEU tolerant flip-flop topologies intended for low supply voltage operation. The most SEU tolerant flip-flop among the proposed flip-flop topologies shows ability of achieving maximum SEU cross-section below 1.9 ·10-10 cm2 /bit (no SEUs detected) at 500 mV supply voltage, 4 ·10-10 cm2 /bit at 250 mV supply voltage, and 2 ·10- 9 cm2 /bit at 180 mV supply voltage. When scaling the supply voltage from 1 V down to 500 mV, 250 mV and 180 mV, the proposed flip-flops achieve at least - 72%, - 92.5% and - 95% (respectively) reduction in energy per transition compared to a Dual Interlocked Storage Cell based flip-flop when operated at a supply voltage of 1 V. The flip-flops have been designed and fabricated in a low-power commercial 90-nm bulk CMOS process and were tested using heavy ions with LET between 8.6 MeV-cm2 /mg and 53.7 MeV-cm2 /mg.

Bidragsytere

Amir Hasanbegovic

  • Tilknyttet:
    Forfatter
    ved Forskningsgruppen for nanoelektronikksystemer ved Universitetet i Oslo

Snorre Aunet

  • Tilknyttet:
    Forfatter
    ved Institutt for elektroniske systemer ved Norges teknisk-naturvitenskapelige universitet
  • Tilknyttet:
    Forfatter
    ved Forskningsgruppen for nanoelektronikksystemer ved Universitetet i Oslo
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