A socket interface for GALS using locally dynamic voltage scaling for rate-adaptive energy saving

A low-power amendment to the globally-asynchronous, locally-synchronous paradigm (GALS) is presented. A proposed socket interface provides locally dynamic voltage scaling (LDVS) adapted to the actual processing rate requirements for each module. Local clock generation by ring oscillators tracks the local device speed at the local supply voltage. Asynchronous I/O handshakes provide the elasticity required to permit the substantial intra-die delay variations present in low voltage, deep sub-micron digital designs to give high yield. By the proposed socket interface, synchronous design methodology can be continued at module level including use of industry standard HDL-based synthesis tools, while module reuse and system design can be substantially simplified.