Evolving Robust Digital Designs

obust electronics is a challenge that the evolvable hardware field is addressing. This paper focusses on tolerance of faults where faults may arise through defects in the technology or unforeseen events. By relaxing the digital abstraction we enable evolution to find robust circuit architectures, exploiting non digital signal variations where necessary. Using a flexible technology and environment simulator, multipliers and adders are extrinsically evolved in noisy environments where gates may fail. The robustness of these evolved circuits are further tested in various noise and gate failure environments.